Preface

Audience for this Manual

This theory of operation manual describes the Leo104 card. This manual is intended for use by sustaining engineers, manufacturing engineers, customer service representatives, quality assurance engineers, and anyone else who needs detailed information on how the card works.

Summary of Contents

The contents of this manual are summarized below.

• Preface describes the information in this manual and some of the nomenclature (abbreviations and such) used in the schematics and in the manual itself. Also contains simplified board layout diagrams and descriptions of what is on each of the schematic pages.

• Chapter 1, "Introduction" contains an overall functional block diagram and a brief introduction to the card, including the card layout and a description of the schematics.

• Chapter 2, "LeoCommand ASIC" describes the LeoCommand ASIC, including an overview, pins, and functional description.

• Chapter 3, "CF Bus" describes the CF Bus, including an overview and a description of the bus signals.

• Chapter 4, "CD Bus" describes the CD Bus, including an overview, a description of the bus signals, a description of the bus packets, and timing.

• Chapter 5, "CX Bus" describes the CX Bus, including an overview, a description of the bus signals, and timing.

• Chapter 6, "LeoFloat ASIC" describes the LeoFloat ASIC, including an overview, pins, and functional description.

• Chapter 7, "LeoDraw ASIC" describes the LeoDraw ASIC, including an overview, pins, and functional description.

• Chapter 8, "Frame Buffer" describes the Frame Buffer section, including the VRAMs.

• Chapter 9, "LeoCross ASIC" describes the LeoCross ASIC, including an overview, pins, and functional description.

• Chapter 10, "Output RAMDAC" describes the Output digital-to-analog converter (DAC), including an overview, the pins, and a functional description.

• Chapter 12, "Boot PROM" describes the Boot PROM, including an overview and a functional description.

• "Glossary" describes many of the terms and acronyms that are unique to this manual.

About This Manual

Most of the chapters are organized into three parts: an overview of the chapter subject, the pin descriptions (if the subject is an ASIC or other device), and a functional description. The information in each chapter is presented in an inverse pyramid manner. That is, the subject is first described at a fairly elementary level, then delved into in increasing detail. Depending on the needs, the reader may not have to or want to read every bit of information in each chapter.

To get proper use of this manual, you should have a copy of the necessary schematics to which this manual refers. The schematic is:

Many specific hardware details, such as connector types and dimensions, are purposely omitted from this manual. Also, this manual does not describe the address map nor provide details of registers. Other manuals that may be of interest to you are shown on the next page.

Schematic and Component Conventions

Whenever possible, the schematics use standard drafting conventions: input signals enter from the left and output signals exit to the right.

Signal Levels and Signal Names

• Both active-high and active-low signals are used. In the schematics, a signal name that is followed by an asterisk (*) indicates that the signal is asserted active low. For instance, WRITE* is an active-low signal. Conversely, a signal without an asterisk denotes a signal that is asserted active high. Another form of indicating an active low signal is to prepend the signal with "_L" (for example WRITE_L). In PAL listings, active-low signals are prepended with an exclamation mark (!).

• Signals that are part of buses are indicated by a common prefix followed by a number in angle brackets. For example, individual bits of a 32-bit data bus might be labeled "D<0," "D<1," and so on to "D<31." The entire 32-bit range would be labeled "D<31:0."

• Off-page references are cited by an annotation at the end or beginning of the signal line. For example:

  

In these examples, the topmost signal (IC_WRITE) goes to schematic page 16, coordinate A8. The bottom signal (VDREN*) comes from schematic page 23, coordinate B2. The BI annotation means "bidirectional".

Component Designators

Each component is assigned one of the following designators:

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Designation  Component
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C            Capacitor
             
D            Diode
             
FL           Filter
             
J            Jumper or DIP switch 
             
L            Inductor
             
P            Connector
             
Q            Descrete transistor
             
R            Discrete resistor and resistor SIP 
             
U            Integrated circuit
             
X            Crystal

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The designator is followed by either four or five decimal digits, depending on the page number. For example, U0106 is an IC on page 1, R2105 is a resistor on page 21.

1. The first two digits refer to the page number on which the component is found. In the case of packages that contain more than one component (for example, F00 quad NAND gates) the first two digits often indicate the page on which the package is first used.

2. The last two or three digits distinguish components on the same page (for example U1707 and U1723 are components numbered 7 and 23 on page 17). Sometimes these values will skip.

Generally, the component numbers are assigned in order from left to right across the page. For instance, U0101 and U0110 are both on page 1 of the schematics. Resistors R2303 and R2306 are both on page 23 of the schematics (these are used here only as illustrations and do not really exist).

Pullups and Pulldowns

Pullups are indicated by "PU" followed by a numeric designator, such as "PU0301."

Pulldowns are indicated by a "PD" followed by a numeric designator, such as "PD0902."