Branch displacement: target is pc + 4 + (sext(displ)*2) where pc is the address of the branch instruction The interactions between PR and SZ are a bit muddled. Both the software and the hardware manuals say that SZ=1 PR=1 produces undefined operation, but this means that it is impossible to configure the FPU so it can both do double arithmetic and double data moves, which would be just totally weird. Marcus Comstedt on port-dreamcast said, in October 2010, that "SZ=0" meant "SZ=0 PR=0" and "SZ=1" meant "(SZ=0 PR=1) or (SZ=1 PR=0)", but that does not seem to be how the hardware works. In May 2011, he did some experiments and said that you can indeed set both bits to 1 and the combination works as it should. Page 275 labels the left-hand column PR; it should be SZ (this from both Valeriy E. Ushakov on port-dreamcast and section 6.6.2 on page 128). There is a typo on page 283, describing fsqrt; the double-precision version should say nnn0 instead of nnnn in the encoding. (This from Marcus Comstedt and Valeriy E. Ushakov on port-dreamcast and table 7.10 on page 146.) Two instructions are not documented in the PDFs; I found out about them from Marcus Comstedt. They have --- for page numbers and are marked "(not in the PDF)". For documentation on them, see after this table. DS = has delay slot IS = illegal in delay slot Pages 136-147 have summary tables. Page numbers are PDF-internal numbering; image-file page numbers are 14 higher. add rM,rN 200 0011nnnnmmmm1100 add #imm,rN 200 0111nnnniiiiiiii addc rM,rN 202 0011nnnnmmmm1110 addv rM,rN 203 0011nnnnmmmm1111 and rM,rN 205 0010nnnnmmmm1001 and #imm,r0 205 11001001iiiiiiii and.b #imm,@(r0,gbr) 205 11001101iiiiiiii bf disp 207 10001011dddddddd IS bf/s disp 209 10001111dddddddd DS IS bra disp 211 1010dddddddddddd DS IS braf rN 213 0000nnnn00100011 DS IS bsr disp 214 1011dddddddddddd DS IS bsrf rN 216 0000nnnn00000011 DS IS bt disp 218 10001001dddddddd IS bt/s disp 220 10001101dddddddd DS IS clrmac 222 0000000000101000 clrs 223 0000000001001000 clrt 224 0000000000001000 cmp/eq rM,rN 225 0011nnnnmmmm0000 cmp/ge rM,rN 225 0011nnnnmmmm0011 cmp/gt rM,rN 225 0011nnnnmmmm0111 cmp/hi rM,rN 225 0011nnnnmmmm0110 cmp/hs rM,rN 225 0011nnnnmmmm0010 cmp/pl rN 225 0100nnnn00010101 cmp/pz rN 225 0100nnnn00010001 cmp/str rM,rN 225 0010nnnnmmmm1100 cmp/eq #imm,r0 225 10001000iiiiiiii div0s rM,rN 229 0010nnnnmmmm0111 div0u 230 0000000000011001 div1 rM,rN 231 0011nnnnmmmm0100 dmuls.l rM,rN 236 0011nnnnmmmm1101 dmulu.l rM,rN 238 0011nnnnmmmm0101 dt rN 240 0100nnnn00010000 exts.b rM,rN 241 0110nnnnmmmm1110 exts.w rM,rN 241 0110nnnnmmmm1111 extu.b rM,rN 243 0110nnnnmmmm1100 extu.w rM,rN 243 0110nnnnmmmm1101 fabs frN 244 1111nnnn01011101 PR=0 fabs drN 244 1111nnn001011101 PR=1 fadd frM,frN 245 1111nnnnmmmm0000 PR=0 fadd drM,drN 245 1111nnn0mmm00000 PR=1 fcmp/eq frM,frN 247 1111nnnnmmmm0100 PR=0 fcmp/eq drM,drN 247 1111nnn0mmm00100 PR=1 fcmp/gt frM,frN 247 1111nnnnmmmm0101 PR=0 fcmp/gt drM,drN 247 1111nnn0mmm00101 PR=1 fcnvds drM,fpul 250 1111mmm010111101 PR=1 fcnvsd fpul,drN 252 1111nnn010101101 PR=1 fdiv frM,frN 254 1111nnnnmmmm0011 PR=0 fdiv drM,drN 254 1111nnn0mmm00011 PR=1 fipr fvM,fvN 258 1111nnmm11101101 PR=0 fldi0 frN 260 1111nnnn10001101 PR=0 fldi1 frN 261 1111nnnn10011101 PR=0 flds frM,fpul 262 1111mmmm00011101 PR not mentioned - irrelevant? float fpul,frN 263 1111nnnn00101101 PR=0 float fpul,drN 263 1111nnn000101101 PR=1 fmac fr0,frM,frN 265 1111nnnnmmmm1110 PR=0 fmov frM,frN 271 1111nnnnmmmm1100 SZ=0 fmov drM,drN 271 1111nnn0mmm01100 SZ=1 fmov.s frM,@rN 271 1111nnnnmmmm1010 SZ=0 fmov drM,@rN 271 1111nnnnmmm01010 SZ=1 fmov.s @rM,frN 271 1111nnnnmmmm1000 SZ=0 fmov @rM,drN 271 1111nnn0mmmm1000 SZ=1 fmov.s @rM+,frN 271 1111nnnnmmmm1001 SZ=0 fmov @rM+,drN 271 1111nnn0mmmm1001 SZ=1 fmov.s frM,@-rN 271 1111nnnnmmmm1011 SZ=0 fmov drM,@-rN 271 1111nnnnmmm01011 SZ=1 fmov.s @(r0,rM),frN 271 1111nnnnmmmm0110 SZ=0 fmov @(r0,rM),drN 271 1111nnn0mmmm0110 SZ=1 fmov.s frM,@(r0,rN) 271 1111nnnnmmmm0111 SZ=0 fmov drM,@(r0,rN) 271 1111nnnnmmm00111 SZ=1 fmov xdM,@rN 275 1111nnnnmmm11010 SZ=1 fmov @rM,xdN 275 1111nnn1mmmm1000 SZ=1 fmov @rM+,xdN 275 1111nnn1mmmm1001 SZ=1 fmov xdM,@-rN 275 1111nnnnmmm11011 SZ=1 fmov @(r0,rM),xdN 275 1111nnn1mmmm0110 SZ=1 fmov xdM,@(r0,rN) 275 1111nnnnmmm10111 SZ=1 fmov xdM,xdN 275 1111nnn1mmm11100 SZ=1 fmov xdM,drN 275 1111nnn0mmm11100 SZ=1 fmov drM,xdN 275 1111nnn1mmm01100 SZ=1 fmul frM,frN 278 1111nnnnmmmm0010 PR=0 fmul drM,drN 278 1111nnn0mmm00010 PR=1 fneg frN 280 1111nnnn01001101 PR=0 fneg drN 280 1111nnn001001101 PR=1 frchg 281 1111101111111101 PR=0 fsca fpul,frN --- 1111nnn011111101 PR=0 (not in the PDF) fschg 282 1111001111111101 PR=0 fsqrt frN 283 1111nnnn01101101 PR=0 fsqrt drN 283 1111nnn001101101 PR=1 fsrra frN --- 1111nnnn01111101 PR=0 (not in the PDF) fsts fpul,frN 286 1111nnnn00001101 PR not mentioned - irrelevant? fsub frM,frN 287 1111nnnnmmmm0001 PR=0 fsub drM,drN 287 1111nnn0mmm00001 PR=1 ftrc frM,fpul 289 1111mmmm00111101 PR=0 ftrc drM,fpul 289 1111mmm000111101 PR=1 ftrv xmtrx,fvN 292 1111nn0111111101 PR=0 jmp @rN 295 0100nnnn00101011 DS IS jsr @rN 296 0100nnnn00001011 DS IS ldc rM,sr 298 0100mmmm00001110 IS ldc rM,gbr 298 0100mmmm00011110 ldc rM,vbr 298 0100mmmm00101110 ldc rM,ssr 298 0100mmmm00111110 ldc rM,spc 298 0100mmmm01001110 ldc rM,dbr 298 0100mmmm11111010 ldc rM,rR_bank 298 0100mmmm1rrr1110 ldc.l @rM+,sr 298 0100mmmm00000111 IS ldc.l @rM+,gbr 298 0100mmmm00010111 ldc.l @rM+,vbr 298 0100mmmm00100111 ldc.l @rM+,ssr 298 0100mmmm00110111 ldc.l @rM+,spc 298 0100mmmm01000111 ldc.l @rM+,dbr 298 0100mmmm11110110 ldc.l @rM+,rR_bank 298 0100mmmm1rrr0111 lds rM,fpul 302 0100mmmm01011010 lds.l @rM+,fpul 302 0100mmmm01010110 lds rM,fpscr 302 0100mmmm01101010 lds.l @rM+,fpscr 302 0100mmmm01100110 lds rM,mach 304 0100mmmm00001010 lds rM,macl 304 0100mmmm00011010 lds rM,pr 304 0100mmmm00101010 lds.l @rM+,mach 304 0100mmmm00000110 lds.l @rM+,macl 304 0100mmmm00010110 lds.l @rM+,pr 304 0100mmmm00100110 ldtlb 306 0000000000111000 mac.l @rM+,@rN+ 308 0000nnnnmmmm1111 mac.w @rM+,@rN+ 312 0100nnnnmmmm1111 mov rM,rN 315 0110nnnnmmmm0011 mov.b rM,@rN 315 0010nnnnmmmm0000 mov.w rM,@rN 315 0010nnnnmmmm0001 mov.l rM,@rN 315 0010nnnnmmmm0010 mov.b @rM,rN 315 0110nnnnmmmm0000 mov.w @rM,rN 315 0110nnnnmmmm0001 mov.l @rM,rN 315 0110nnnnmmmm0010 mov.b rM,@-rN 315 0010nnnnmmmm0100 mov.w rM,@-rN 315 0010nnnnmmmm0101 mov.l rM,@-rN 315 0010nnnnmmmm0110 mov.b @rM+,rN 315 0110nnnnmmmm0100 mov.w @rM+,rN 315 0110nnnnmmmm0101 mov.l @rM+,rN 315 0110nnnnmmmm0110 mov.b rM,@(r0,rN) 315 0000nnnnmmmm0100 mov.w rM,@(r0,rN) 315 0000nnnnmmmm0101 mov.l rM,@(r0,rN) 315 0000nnnnmmmm0110 mov.b @(r0,rM),rN 315 0000nnnnmmmm1100 mov.w @(r0,rM),rN 315 0000nnnnmmmm1101 mov.l @(r0,rM),rN 315 0000nnnnmmmm1110 mov #imm,rN 320 1110nnnniiiiiiii mov.w @(off,pc),rN 320 1001nnnnoooooooo IS off is unsigned and ×2 mov.l @(off,pc),rN 320 1101nnnnoooooooo IS off is unsigned and ×4 mov.b @(off,gbr),r0 323 11000100oooooooo off is unsigned mov.w @(off,gbr),r0 323 11000101oooooooo off is unsigned and ×2 mov.l @(off,gbr),r0 323 11000110oooooooo off is unsigned and ×4 mov.b r0,@(off,gbr) 323 11000000oooooooo off is unsigned mov.w r0,@(off,gbr) 323 11000001oooooooo off is unsigned and ×2 mov.l r0,@(off,gbr) 323 11000010oooooooo off is unsigned and ×4 mov.b r0,@(off,rN) 326 10000000nnnnoooo off is unsigned mov.w r0,@(off,rN) 326 10000001nnnnoooo off is unsigned and ×2 mov.l rM,@(off,rN) 326 0001nnnnmmmmoooo off is unsigned and ×4 mov.b @(off,rM),r0 326 10000100mmmmoooo off is unsigned mov.w @(off,rM),r0 326 10000101mmmmoooo off is unsigned and ×2 mov.l @(off,rM),rN 326 0101nnnnmmmmoooo off is unsigned and ×4 mova @(off,pc),r0 329 11000111oooooooo IS off is unsigned and ×4 movca.l r0,@rN 330 0000nnnn11000011 movt rN 331 0000nnnn00101001 mul.l rM,rN 332 0000nnnnmmmm0111 muls.w rM,rN 333 0010nnnnmmmm1111 mulu.w rM,rN 334 0010nnnnmmmm1110 neg rM,rN 335 0110nnnnmmmm1011 negc rM,rN 336 0110nnnnmmmm1010 nop 337 0000000000001001 not rM,rN 338 0110nnnnmmmm0111 ocbi @rN 339 0000nnnn10010011 ocbp @rN 340 0000nnnn10100011 ocbwb @rN 341 0000nnnn10110011 or rM,rN 342 0010nnnnmmmm1011 or #imm,r0 342 11001011iiiiiiii or.b #imm,@(r0,gbr) 342 11001111iiiiiiii pref @rN 344 0000nnnn10000011 rotcl rN 345 0100nnnn00100100 rotcr rN 346 0100nnnn00100101 rotl rN 347 0100nnnn00000100 rotr rN 348 0100nnnn00000101 rte 349 0000000000101011 DS IS rts 351 0000000000001011 DS IS sets 353 0000000001011000 sett 354 0000000000011000 shad rM,rN 355 0100nnnnmmmm1100 shal rN 357 0100nnnn00100000 shar rN 358 0100nnnn00100001 shld rM,rN 359 0100nnnnmmmm1101 shll rN 361 0100nnnn00000000 shll2 rN 362 0100nnnn00001000 shll8 rN 362 0100nnnn00011000 shll16 rN 362 0100nnnn00101000 shlr rN 364 0100nnnn00000001 shlr2 rN 365 0100nnnn00001001 shlr8 rN 365 0100nnnn00011001 shlr16 rN 365 0100nnnn00101001 sleep 367 0000000000011011 stc sr,rN 368 0000nnnn00000010 stc gbr,rN 368 0000nnnn00010010 stc vbr,rN 368 0000nnnn00100010 stc ssr,rN 368 0000nnnn00110010 stc spc,rN 368 0000nnnn01000010 stc sgr,rN 368 0000nnnn00111010 stc dbr,rN 368 0000nnnn11111010 stc rR_bank,rN 368 0000nnnn1rrr0010 stc.l sr,@-rN 368 0100nnnn00000011 stc.l gbr,@-rN 368 0100nnnn00010011 stc.l vbr,@-rN 368 0100nnnn00100011 stc.l ssr,@-rN 368 0100nnnn00110011 stc.l spc,@-rN 368 0100nnnn01000011 stc.l sgr,@-rN 368 0100nnnn00110010 stc.l dbr,@-rN 368 0100nnnn11110010 stc.l rR_bank,@-rN 368 0100nnnn1rrr0011 sts mach,rN 373 0000nnnn00001010 sts macl,rN 373 0000nnnn00011010 sts pr,rN 373 0000nnnn00101010 sts.l mach,@-rN 373 0100nnnn00000010 sts.l macl,@-rN 373 0100nnnn00010010 sts.l pr,@-rN 373 0100nnnn00100010 sts fpul,rN 375 0000nnnn01011010 sts fpscr,rN 375 0000nnnn01101010 sts.l fpul,@-rN 375 0100nnnn01010010 sts.l fpscr,@-rN 375 0100nnnn01100010 sub rM,rN 377 0011nnnnmmmm1000 subc rM,rN 378 0011nnnnmmmm1010 subv rM,rN 379 0011nnnnmmmm1011 swap.b rM,rN 381 0110nnnnmmmm1000 swap.w rM,rN 381 0110nnnnmmmm1001 tas.b @rN 383 0100nnnn00011011 trapa #imm 385 11000011iiiiiiii IS tst rM,rN 386 0010nnnnmmmm1000 tst #imm,r0 386 11001000iiiiiiii tst.b #imm,@(r0,gbr) 386 11001100iiiiiiii xor rM,rN 388 0010nnnnmmmm1010 xor #imm,r0 388 11001010iiiiiiii xor.b #imm,@(r0,gbr) 388 11001110iiiiiiii xtrct rM,rN 390 0010nnnnmmmm1101 fsca: (single) floating sine/cosine approximation fsca fpul,frN (N must be even) -> frN = sin(fpul), frN+1 = cos(fpul) The argument is in units in which 65536 is a full circle; fpul is taken as an integer (so the high 16 bits are ignored). fsrra: (single) floating square root & reciprocal approximation fsrra frN -> frN = 1/sqrt(frN) Apparently designed for normalizing vectors: a sequence of fipr, fsrra, fmul, fmul, fmul is substantially faster than fipr, fsqrt, fdiv, fdiv, fdiv. (fsrra executs in half the time of either fsqrt or fdiv.)