$$#include "parse-fsm.h" $$#include "parse-action.h" $trace pl_trace $action pl_action $prefix parseline /* Keep string_delim in sync with DELIMS in main.c */ $anyof string_delim !"#$%&'*+,-./:=?@\\^_`|~ $anyof whitespace \ \t\n\r\f $anyof opchar +-*/%&|^~<>! $state $tran $lambda->macro_line ?in_macro_def $tran ".if"->dot_if $tran ".elif"->dot_elif $tran ".else"->dot_else $tran ".endif"->dot_endif $tran $lambda->$exit ?false_if $tran !assignment->trailing_comment do_assignment $tran ".include"->dot_include $tran ".list"->dot_list $tran ".macro"->begin_macro $tran ".vmu"->trailing_comment use_cpu(CPU_VMU) $tran ".sh"->trailing_comment use_cpu(CPU_SH) $tran !label set_label $tran !loclabel set_loclabel $tran $lambda $state $tran ".align"->dot_align $tran ".byte"->assemble_data set_data_size(1) $tran ".word"->assemble_data set_data_size(2) $tran ".long"->assemble_data set_data_size(4) $tran ".quad"->assemble_data set_data_size(8) $tran ".rbyte"->assemble_repeat set_data_size(1) $tran ".rword"->assemble_repeat set_data_size(2) $tran ".rlong"->assemble_repeat set_data_size(4) $tran ".rquad"->assemble_repeat set_data_size(8) $tran ".space"->assemble_space $tran ".ascii"->assemble_ascii $tran ".ascic"->assemble_ascic $tran ".asciz"->assemble_asciz $tran $symbol->macro_call ?name_for_call($arg) $tran $lambda->for_vmu ?if_cpu(CPU_VMU) $tran $lambda->for_sh ?if_cpu(CPU_SH) $state for_sh $tran ".pr"->floating_size fsize_is_pr $tran ".sz"->floating_size fsize_is_sz $tran ".entry"->assemble_entry $tran ".empty"->trailing_comment opc_delay_slot_empty $tran !pseudo_instr->trailing_comment $tran !instruction->trailing_comment assemble_instruction $tran $lambda->trailing_comment $state for_vmu $tran !pseudo_vinstr->trailing_comment $tran !vinstruction->trailing_comment $tran $lambda->trailing_comment $state macro_call $tran $lambda->$exit do_macro_call $state begin_macro $tran '-'->macro_undef $tran $symbol set_macro_name($arg) $state $tran $symbol set_macro_arg($arg) $tran ':'->macro_arg macro_locals $tran !trailing_comment->$exit start_macro_def $state another_macro_arg $tran ',' $tran ':' macro_locals $tran !trailing_comment->$exit start_macro_def $state macro_arg $tran $symbol->another_macro_arg set_macro_arg($arg) $state macro_undef $tran $symbol set_macro_name($arg) $state $tran !trailing_comment->$exit undefine_macro $state macro_line $tran ".macro"->$exit push_macro_depth $tran ".endm"->$exit pop_macro_depth $tran $lambda->$exit save_macro_line $state assemble_entry $tran !expression->trailing_comment assemble_entry_expression $state assemble_data $tran !expression assemble_data_expression $state $tran ','->assemble_data $tran $lambda->trailing_comment $state assemble_space $tran !expression->trailing_comment assemble_space_expression $state assemble_repeat $tran !expression ?assemble_repeat_count $state $tran ',' $state $tran !expression->trailing_comment assemble_repeat_value $state assemble_ascii $tran !string->trailing_comment assemble_ascii $state assemble_ascic $tran !string->trailing_comment assemble_ascic $state assemble_asciz $tran !string->trailing_comment assemble_asciz $state dot_include $tran !string->trailing_comment push_include $state dot_list $tran "on"->dot_list set_listing(1) $tran "off"->dot_list set_listing(0) $tran "push"->dot_list push_listing $tran "pop"->dot_list pop_listing $tran $lambda->trailing_comment $state dot_if $tran !expression->trailing_comment do_if $state dot_elif $tran !expression->trailing_comment do_elif $state dot_else $tran $lambda->trailing_comment do_else $state dot_endif $tran $lambda->trailing_comment do_endif $state dot_align $tran !expression->trailing_comment do_align $state trailing_comment $tran ';'->$exit $tran $eos->$exit $state symbol $tran "sh\\" save_symbol_space(CPU_SH) $tran "vmu\\" save_symbol_space(CPU_VMU) $tran $lambda save_symbol_space_cur $state $tran $symbol->$exit save_symbol_name($arg) $state label $tran !symbol save_label_symbol $state $tran ':'->$exit $state loclabel $tran $digit locsym_set_digit($arg) $state $tran ':'->$exit $state assignment $tran !symbol save_assignment_symbol $tran '.' save_assignment_symbol_dot $state $tran '=' $state $tran !expression->$exit save_assignment_expression $state expression $tran $lambda begin_expression $state $tran !expression_->$exit end_expression $tran $lambda->$fail abort_expression $state expression_ $tran $anyof whitespace->expression_ $tran '@'->function_call $tran "<<"->expression_ ?expr_str_op("<<") $tran ">>"->expression_ ?expr_str_op(">>") $tran "<="->expression_ ?expr_str_op("<=") $tran ">="->expression_ ?expr_str_op(">=") $tran "=="->expression_ ?expr_str_op("==") $tran "!="->expression_ ?expr_str_op("!=") $tran $anyof opchar->expression_ ?expr_op($arg) $tran '['->expression_ ?expr_paren('('/*)*/) $tran ']'->expression_ ?expr_paren(/*(*/')') $tran '\''->char_constant $tran '$'->hex_constant $tran !locsymref->expression_ ?expr_locsymref $tran !symbol->expression_ ?expr_symbol $tran '.'->expression_ ?expr_symbol_dot $tran "0x"->hex_constant $tran "0X"->hex_constant $tran "0"->octal_constant_or_nil $tran "0o"->octal_constant $tran "0O"->octal_constant $tran "0b"->binary_constant $tran "0B"->binary_constant $tran "0t"->decimal_constant $tran "0T"->decimal_constant $tran $decimal->expression_ ?expr_constant($arg) $tran $lambda->$exit ?expr_can_end $state function_call $tran $symbol ?function_call_name($arg) $state $tran '['->expression_ push_function_open $state char_constant $tran $any->expression_ ?expr_constant($arg) $state hex_constant $tran $hex->expression_ ?expr_constant($arg) $state octal_constant $tran $octal->expression_ ?expr_constant($arg) $state octal_constant_or_nil $tran $octal->expression_ ?expr_constant($arg) $tran $lambda->expression_ ?expr_constant(0) $state binary_constant $tran $binary->expression_ ?expr_constant($arg) $state decimal_constant $tran $decimal->expression_ ?expr_constant($arg) $state locsymref $tran $digit locsym_set_digit($arg) $state $tran 'f'->$exit locsym_set_direction('f') $tran 'b'->$exit locsym_set_direction('b') $state string $tran $lambda init_string $state string_part /* Keep this list in sync with DELIMS in main.c */ $tran '('->expr_string_part $tran $anyof string_delim->in_string_part begin_string_part($arg) $tran $lambda->$exit ?end_string(0) $tran $lambda->$fail end_string(1) $state in_string_part $tran $any->string_part ?is_string_term($arg) $tran $any->in_string_part save_string_char($arg) $tran $lambda->$fail abort_string $state expr_string_part $tran ')'->string_part $tran $lambda $state expr_string_expr $tran !expression save_string_expr $tran $lambda->$fail abort_string $state $tran ','->expr_string_expr $tran ')'->string_part $tran $lambda->$fail abort_string $state floating_size $tran "0"->trailing_comment fsize_is_0 $tran "1"->trailing_comment fsize_is_1 $tran "any"->trailing_comment fsize_is_any $state instruction $tran "addc"->instr_rM_rN opc_base(0x300e,0xf00f) $tran "addv"->instr_rM_rN opc_base(0x300f,0xf00f) $tran "add"->instr_add $tran "and.b"->instr_imm_a_r0_gbr opc_base(0xcd00,0xff00) $tran "and"->instr_and $tran "bf/s"->instr_branch8_d opc_base(0x8f00,0xff00) $tran "bf"->instr_branch8_nd opc_base(0x8b00,0xff00) $tran "braf"->instr_branch_rN opc_base(0x0023,0xf0ff) $tran "bra"->instr_branch12 opc_base(0xa000,0xf000) $tran "bsrf"->instr_branch_rN opc_base(0x0003,0xf0ff) $tran "bsr"->instr_branch12 opc_base(0xb000,0xf000) $tran "bt/s"->instr_branch8_d opc_base(0x8d00,0xff00) $tran "bt"->instr_branch8_nd opc_base(0x8900,0xff00) $tran "clrmac"->$exit opc_base(0x0028,0xffff) $tran "clrs"->$exit opc_base(0x0048,0xffff) $tran "clrt"->$exit opc_base(0x0008,0xffff) $tran "cmp/eq"->instr_cmp_eq $tran "cmp/ge"->instr_rM_rN opc_base(0x3003,0xf00f) $tran "cmp/gt"->instr_rM_rN opc_base(0x3007,0xf00f) $tran "cmp/hi"->instr_rM_rN opc_base(0x3006,0xf00f) $tran "cmp/hs"->instr_rM_rN opc_base(0x3002,0xf00f) $tran "cmp/pl"->instr_rN opc_base(0x4015,0xf0ff) $tran "cmp/pz"->instr_rN opc_base(0x4011,0xf0ff) $tran "cmp/str"->instr_rM_rN opc_base(0x200c,0xf00f) $tran "div0s"->instr_rM_rN opc_base(0x2007,0xf00f) $tran "div0u"->$exit opc_base(0x0019,0xffff) $tran "div1"->instr_rM_rN opc_base(0x3004,0xf00f) $tran "dmuls.l"->instr_rM_rN opc_base(0x300d,0xf00f) $tran "dmulu.l"->instr_rM_rN opc_base(0x3005,0xf00f) $tran "dt"->instr_rN opc_base(0x4010,0xf0ff) $tran "exts.b"->instr_rM_rN opc_base(0x600e,0xf00f) $tran "exts.w"->instr_rM_rN opc_base(0x600f,0xf00f) $tran "extu.b"->instr_rM_rN opc_base(0x600c,0xf00f) $tran "extu.w"->instr_rM_rN opc_base(0x600d,0xf00f) $tran "fabs"->instr_frdrN opc_base(0xf05d,0xf0ff) $tran "fadd"->instr_frdrM_frdrN opc_base(0xf000,0xf00f) $tran "fcmp/eq"->instr_frdrM_frdrN opc_base(0xf004,0xf00f) $tran "fcmp/gt"->instr_frdrM_frdrN opc_base(0xf005,0xf00f) $tran "fcnvds"->instr_drN_fpul opc_base(0xf0bd,0xf0ff) $tran "fcnvsd"->instr_fpul_drN opc_base(0xf0ad,0xf0ff) $tran "fdiv"->instr_frdrM_frdrN opc_base(0xf003,0xf00f) $tran "fipr"->instr_fvM_fvN opc_base(0xf0ed,0xf0ff) $tran "fldi0"->instr_frN opc_base(0xf08d,0xf0ff) $tran "fldi1"->instr_frN opc_base(0xf09d,0xf0ff) $tran "flds"->instr_frN_fpul opc_base(0xf01d,0xf0ff) $tran "float"->instr_fpul_frdrN opc_base(0xf02d,0xf0ff) $tran "fmac"->instr_fr0_frM_frN opc_base(0xf00e,0xf00f) $tran "fmov.s"->instr_fmov_s $tran "fmov"->instr_fmov $tran "fmul"->instr_frdrM_frdrN opc_base(0xf002,0xf00f) $tran "fneg"->instr_frdrN opc_base(0xf04d,0xf0ff) $tran "frchg"->instr_frchg $tran "fschg"->instr_fschg $tran "fsqrt"->instr_frdrN opc_base(0xf06d,0xf0ff) $tran "fsts"->instr_fpul_frN opc_base(0xf00d,0xf0ff) $tran "fsub"->instr_frdrM_frdrN opc_base(0xf001,0xf00f) $tran "ftrc"->instr_frdrN_fpul opc_base(0xf03d,0xf0ff) $tran "ftrv"->instr_xmtrx_fvN opc_base(0xf1fd,0xf3ff) $tran "jmp"->instr_branch_arN opc_base(0x402b,0xf0ff) $tran "jsr"->instr_branch_arN opc_base(0x400b,0xf0ff) $tran "ldc.l"->instr_ldc_l $tran "ldc"->instr_ldc $tran "lds.l"->instr_lds_l $tran "lds"->instr_lds $tran "ldtlb"->$exit opc_base(0x0038,0xffff) $tran "mac.l"->instr_arMplus_arNplus opc_base(0x000f,0xf00f) $tran "mac.w"->instr_arMplus_arNplus opc_base(0x400f,0xf00f) $tran "movca.l"->instr_r0_arN opc_base(0x00c3,0xf0ff) $tran "mova"->instr_mova $tran "movt"->instr_rN opc_base(0x0029,0xf0ff) $tran "mov.b"->instr_mov_b $tran "mov.w"->instr_mov_w $tran "mov.l"->instr_mov_l $tran "mov"->instr_mov $tran "mul.l"->instr_rM_rN opc_base(0x0007,0xf00f) $tran "muls.w"->instr_rM_rN opc_base(0x200f,0xf00f) $tran "mulu.w"->instr_rM_rN opc_base(0x200e,0xf00f) $tran "negc"->instr_rM_rN opc_base(0x600a,0xf00f) $tran "neg"->instr_rM_rN opc_base(0x600b,0xf00f) $tran "nop"->$exit opc_base(0x0009,0xffff) $tran "not"->instr_rM_rN opc_base(0x6007,0xf00f) $tran "ocbi"->instr_arN opc_base(0x0093,0xf0ff) $tran "ocbp"->instr_arN opc_base(0x00a3,0xf0ff) $tran "ocbwb"->instr_arN opc_base(0x00b3,0xf0ff) $tran "or.b"->instr_imm_a_r0_gbr opc_base(0xcf00,0xff00) $tran "or"->instr_or $tran "pref"->instr_arN opc_base(0x0083,0xf0ff) $tran "rotcl"->instr_rN opc_base(0x4024,0xf0ff) $tran "rotcr"->instr_rN opc_base(0x4025,0xf0ff) $tran "rotl"->instr_rN opc_base(0x4004,0xf0ff) $tran "rotr"->instr_rN opc_base(0x4005,0xf0ff) $tran "rte"->instr_return_tail opc_base(0x002b,0xffff) $tran "rts"->instr_return_tail opc_base(0x000b,0xffff) $tran "sets"->$exit opc_base(0x0058,0xffff) $tran "sett"->$exit opc_base(0x0018,0xffff) $tran "shad"->instr_rM_rN opc_base(0x400c,0xf00f) $tran "shal"->instr_rN opc_base(0x4020,0xf0ff) $tran "shar"->instr_rN opc_base(0x4021,0xf0ff) $tran "shld"->instr_rM_rN opc_base(0x400d,0xf00f) $tran "shll16"->instr_rN opc_base(0x4028,0xf0ff) $tran "shll8"->instr_rN opc_base(0x4018,0xf0ff) $tran "shll2"->instr_rN opc_base(0x4008,0xf0ff) $tran "shll"->instr_rN opc_base(0x4000,0xf0ff) $tran "shlr16"->instr_rN opc_base(0x4029,0xf0ff) $tran "shlr8"->instr_rN opc_base(0x4019,0xf0ff) $tran "shlr2"->instr_rN opc_base(0x4009,0xf0ff) $tran "shlr"->instr_rN opc_base(0x4001,0xf0ff) $tran "sleep"->$exit opc_base(0x001b,0xffff) $tran "stc.l"->instr_stc_l $tran "stc"->instr_stc $tran "sts.l"->instr_sts_l $tran "sts"->instr_sts $tran "subc"->instr_rM_rN opc_base(0x300a,0xf00f) $tran "subv"->instr_rM_rN opc_base(0x300b,0xf00f) $tran "sub"->instr_rM_rN opc_base(0x3008,0xf00f) $tran "swap.b"->instr_rM_rN opc_base(0x6008,0xf00f) $tran "swap.w"->instr_rM_rN opc_base(0x6009,0xf00f) $tran "tas.b"->instr_arN opc_base(0x401b,0xf0ff) $tran "trapa"->instr_trapa opc_base(0xc300,0xff00) $tran "tst.b"->instr_imm_a_r0_gbr opc_base(0xcc00,0xff00) $tran "tst"->instr_tst $tran "xor.b"->instr_imm_a_r0_gbr opc_base(0xce00,0xff00) $tran "xor"->instr_xor $tran "xtrct"->instr_rM_rN opc_base(0x200d,0xf00f) $state instr_add $tran !ops_imm_rN->$exit opc_base(0x7000,0xf000) $tran !ops_rM_rN->$exit opc_base(0x300c,0xf00f) $state instr_and $tran !ops_imm_r0->$exit opc_base(0xc900,0xff00) $tran !ops_rM_rN->$exit opc_base(0x2009,0xf00f) $state instr_cmp_eq $tran !ops_imm_r0->$exit opc_base(0x8800,0xff00) $tran !ops_rM_rN->$exit opc_base(0x3000,0xf00f) $state instr_fmov_s $tran !ops_a_r0_rM_frN->$exit opc_base(0xf006,0xf00f) $tran !ops_arMplus_frN->$exit opc_base(0xf009,0xf00f) $tran !ops_arM_frN->$exit opc_base(0xf008,0xf00f) $tran !ops_frM_a_r0_rN->$exit opc_base(0xf007,0xf00f) $tran !ops_frM_aminusrN->$exit opc_base(0xf00b,0xf00f) $tran !ops_frM_afrN->$exit opc_base(0xf00a,0xf00f) $state instr_fmov $tran !ops_a_r0_rM_drN->$exit opc_base(0xf006,0xf00f) $tran !ops_a_r0_rM_xdN->$exit opc_base(0xf006,0xf00f) $tran !ops_arMplus_drN->$exit opc_base(0xf009,0xf00f) $tran !ops_arMplus_xdN->$exit opc_base(0xf009,0xf00f) $tran !ops_arM_drN->$exit opc_base(0xf008,0xf00f) $tran !ops_arM_xdN->$exit opc_base(0xf008,0xf00f) $tran !ops_drM_a_r0_rN->$exit opc_base(0xf007,0xf00f) $tran !ops_drM_aminusrN->$exit opc_base(0xf00b,0xf00f) $tran !ops_drM_arN->$exit opc_base(0xf00a,0xf00f) $tran !ops_drM_drN->$exit opc_base(0xf00c,0xf00f) $tran !ops_drM_xdN->$exit opc_base(0xf00c,0xf00f) $tran !ops_frM_frN->$exit opc_base(0xf00c,0xf00f) $tran !ops_xdM_a_r0_rN->$exit opc_base(0xf007,0xf00f) $tran !ops_xdM_aminusrN->$exit opc_base(0xf00b,0xf00f) $tran !ops_xdM_arN->$exit opc_base(0xf00a,0xf00f) $tran !ops_xdM_drN->$exit opc_base(0xf00c,0xf00f) $tran !ops_xdM_xdN->$exit opc_base(0xf00c,0xf00f) $state instr_frchg $tran $lambda opc_base(0xfbfd,0xffff) $state $tran $lambda->$exit pr_mustbe(0) $state instr_fschg $tran $lambda opc_base(0xf3fd,0xffff) $state $tran $lambda->$exit pr_mustbe(0) $state instr_ldc_l $tran !ops_ldc_l->$exit opc_delay_slot_illegal_if_sr $state instr_ldc $tran !ops_ldc->$exit opc_delay_slot_illegal_if_sr $state instr_lds_l $tran !ops_lds_l->$exit $state instr_lds $tran !ops_lds->$exit $state instr_stc_l $tran !ops_stc_l->$exit $state instr_stc $tran !ops_stc->$exit $state instr_sts_l $tran !ops_sts_l->$exit $state instr_sts $tran !ops_sts->$exit $state instr_mova $tran !ops_a_off_pc_r0 opc_base(0xc700,0xff00) $tran !ops_pcrel_a->instr_mova_tail $state $tran $lambda offset_shift(2) $state instr_mova_tail $tran $lambda->$exit opc_delay_slot_illegal $state instr_mov_b $tran !ops_a_r0_rM_rN->$exit opc_base(0x000c,0xf00f) $tran !ops_a_off_gbr_r0->$exit opc_base(0xc400,0xff00) $tran !ops_a_off_rM_r0->$exit opc_base(0x8400,0xff00) $tran !ops_arMplus_rN->$exit opc_base(0x6004,0xf00f) $tran !ops_arM_rN->$exit opc_base(0x6000,0xf00f) $tran !ops_rM_a_r0_rN->$exit opc_base(0x0004,0xf00f) $tran !ops_r0_a_off_gbr->$exit opc_base(0xc000,0xff00) $tran !ops_r0_a_off_rM->$exit opc_base(0x8000,0xff00) $tran !ops_rM_aminusrN->$exit opc_base(0x2004,0xf00f) $tran !ops_rM_arN->$exit opc_base(0x2000,0xf00f) $state instr_mov_w $tran !ops_a_r0_rM_rN->$exit opc_base(0x000d,0xf00f) $tran !ops_a_off_gbr_r0 opc_base(0xc500,0xff00) $tran !ops_a_off_pc_rN->instr_mwidc opc_base(0x9000,0xf000) $tran !ops_a_off_rM_r0 opc_base(0x8500,0xff00) $tran !ops_arMplus_rN->$exit opc_base(0x6005,0xf00f) $tran !ops_arM_rN->$exit opc_base(0x6001,0xf00f) $tran !ops_rM_a_r0_rN->$exit opc_base(0x0005,0xf00f) $tran !ops_r0_a_off_gbr opc_base(0xc100,0xff00) $tran !ops_r0_a_off_rM opc_base(0x8100,0xff00) $tran !ops_rM_aminusrN->$exit opc_base(0x2005,0xf00f) $tran !ops_rM_arN->$exit opc_base(0x2001,0xf00f) $tran !ops_pcrel_w->$exit opc_delay_slot_illegal $state instr_mov_w_set_shift $tran $lambda->$exit offset_shift(1) $state instr_mwidc $tran $lambda->instr_mov_w_set_shift opc_delay_slot_illegal $state instr_mov_l $tran !ops_a_r0_rM_rN->$exit opc_base(0x000e,0xf00f) $tran !ops_a_off_gbr_r0 opc_base(0xc600,0xff00) $tran !ops_a_off_pc_rN->instr_mlidc opc_base(0xd000,0xf000) $tran !ops_a_off_rM_rN opc_base(0x5000,0xf000) $tran !ops_arMplus_rN->$exit opc_base(0x6006,0xf00f) $tran !ops_arM_rN->$exit opc_base(0x6002,0xf00f) $tran !ops_rM_a_r0_rN->$exit opc_base(0x0006,0xf00f) $tran !ops_r0_a_off_gbr opc_base(0xc200,0xff00) $tran !ops_rM_a_off_rN opc_base(0x1000,0xf000) $tran !ops_rM_aminusrN->$exit opc_base(0x2006,0xf00f) $tran !ops_rM_arN->$exit opc_base(0x2002,0xf00f) $tran !ops_pcrel_l->$exit opc_delay_slot_illegal $state instr_mov_l_set_shift $tran $lambda->$exit offset_shift(2) $state instr_mlidc $tran $lambda->instr_mov_l_set_shift opc_delay_slot_illegal $state instr_mov $tran !ops_imm_rN->$exit opc_base(0xe000,0xf000) $tran !ops_rM_rN->$exit opc_base(0x6003,0xf00f) $state instr_or $tran !ops_imm_r0->$exit opc_base(0xcb00,0xff00) $tran !ops_rM_rN->$exit opc_base(0x200b,0xf00f) $state instr_tst $tran !ops_imm_r0->$exit opc_base(0xc800,0xff00) $tran !ops_rM_rN->$exit opc_base(0x2008,0xf00f) $state instr_xor $tran !ops_imm_r0->$exit opc_base(0xca00,0xff00) $tran !ops_rM_rN->$exit opc_base(0x200a,0xf00f) $state instr_rM_rN $tran !ops_rM_rN->$exit $state instr_branch8_d $tran $lambda->instr_branch8 opc_delay_slot_has $state instr_branch8_nd $tran $lambda->instr_branch8 $state instr_branch8 $tran !ops_branch8->$exit opc_delay_slot_illegal $state instr_branch_rN $tran $lambda opc_delay_slot_has $state instr_rN $tran !ops_rN->$exit $state instr_branch12 $tran !ops_branch12->$exit opc_delay_slot_has $state instr_frdrN $tran !ops_frdrN->$exit $state instr_frdrM_frdrN $tran !ops_frdrM_frdrN->$exit $state instr_drN_fpul $tran !ops_drN_fpul->$exit $state instr_fpul_drN $tran !ops_fpul_drN->$exit $state instr_fvM_fvN $tran !ops_fvM_fvN->$exit $state instr_frN $tran !ops_frN->$exit $state instr_frN_fpul $tran !ops_frN_fpul->$exit $state instr_fpul_frdrN $tran !ops_fpul_frdrN->$exit $state instr_fr0_frM_frN $tran !ops_fr0_frM_frN->$exit $state instr_fpul_frN $tran !ops_fpul_frN->$exit $state instr_frdrN_fpul $tran !ops_frdrN_fpul->$exit $state instr_xmtrx_fvN $tran !ops_xmtrx_fvN->$exit $state instr_arMplus_arNplus $tran !ops_arMplus_arNplus->$exit $state instr_r0_arN $tran !ops_r0_arN->$exit $state instr_branch_arN $tran $lambda opc_delay_slot_has $state instr_arN $tran !ops_arN->$exit $state instr_imm_a_r0_gbr $tran !ops_imm_a_r0_gbr->$exit $state instr_trapa $tran !ops_imm->$exit opc_delay_slot_illegal $state instr_return_tail $tran $lambda->$exit opc_delay_slot_has $state ops_rM_rN $tran $lambda reset_ops $state $tran !rM $state $tran ',' $state $tran !rN->$exit $state ops_imm_a_r0_gbr $tran $lambda reset_ops $state $tran !imm $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran "gbr" $state $tran ')'->$exit $state ops_branch8 $tran $lambda reset_ops $state $tran !expression->$exit branch_displacement(8) $state ops_branch12 $tran $lambda reset_ops $state $tran !expression->$exit branch_displacement(12) $state ops_rN $tran $lambda reset_ops $state $tran !rN->$exit $state ops_frdrN $tran $lambda reset_ops $state $tran !ops__frN->$exit pr_mustbe(0) $tran !ops__drN->$exit pr_mustbe(1) $state ops__frN $tran !frN->$exit $state ops__drN $tran !drN->$exit $state ops_frdrM_frdrN $tran $lambda reset_ops $state $tran !ops__frM_frN->$exit pr_mustbe(0) $tran $lambda reset_ops $state $tran !ops__drM_drN->$exit pr_mustbe(1) $state ops__frM_frN $tran !frM $state $tran ',' $state $tran !frN->$exit $state ops__drM_drN $tran !drM $state $tran ',' $state $tran !drN->$exit $state ops_drN_fpul $tran $lambda reset_ops $state $tran !drN $state $tran ',' $state $tran "fpul"->$exit pr_mustbe(1) $state ops_fpul_drN $tran "fpul" reset_ops $state $tran ',' $state $tran !drN $state $tran $lambda->$exit pr_mustbe(1) $state ops_fvM_fvN $tran $lambda reset_ops $state $tran !fvM $state $tran ',' $state $tran !fvN $state $tran $lambda->$exit pr_mustbe(0) $state ops_frN $tran $lambda reset_ops $state $tran !frN $state $tran $lambda->$exit pr_mustbe(0) $state ops_frN_fpul $tran $lambda reset_ops $state $tran !frN $state $tran ',' $state $tran "fpul"->$exit $state ops_fpul_frdrN $tran $lambda reset_ops $state $tran !ops__fpul_frN->$exit pr_mustbe(0) $tran !ops__fpul_drN->$exit pr_mustbe(1) $state ops__fpul_frN $tran "fpul" $state $tran "," $state $tran !frN->$exit $state ops__fpul_drN $tran "fpul" $state $tran "," $state $tran !drN->$exit $state ops_fr0_frM_frN $tran $lambda reset_ops $state $tran !fr0 $state $tran ',' $state $tran !frM $state $tran ',' $state $tran !frN $state $tran $lambda->$exit pr_mustbe(0) $state ops_imm_rN $tran $lambda reset_ops $state $tran !imm $state $tran ',' $state $tran !rN->$exit $state ops_imm_rN_opt_rM $tran $lambda reset_ops $state $tran !imm $state $tran ',' $state $tran !rN $state $tran ',' $tran $lambda->$exit $state $tran !rM->$exit $state ops_imm_r0 $tran $lambda reset_ops $state $tran !imm $state $tran ',' $state $tran !r0->$exit $state ops_a_r0_rM_frN $tran '@' reset_ops $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rM $state $tran ')' $state $tran ',' $state $tran !frN->$exit sz_mustbe(0) $state ops_arMplus_frN $tran '@' reset_ops $state $tran !rM $state $tran '+' $state $tran ',' $state $tran !frN->$exit sz_mustbe(0) $state ops_arM_frN $tran '@' reset_ops $state $tran !rM $state $tran ',' $state $tran !frN->$exit sz_mustbe(0) $state ops_frM_a_r0_rN $tran $lambda reset_ops $state $tran !frM $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rN $state $tran ')'->$exit sz_mustbe(0) $state ops_frM_aminusrN $tran $lambda reset_ops $state $tran !frM $state $tran ',' $state $tran '@' $state $tran '-' $state $tran !rN->$exit sz_mustbe(0) $state ops_frM_afrN $tran $lambda reset_ops $state $tran !frM $state $tran ',' $state $tran '@' $state $tran !rN->$exit sz_mustbe(0) $state ops_a_r0_rM_drN $tran '@' reset_ops $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rM $state $tran ')' $state $tran ',' $state $tran !drN->$exit sz_mustbe(1) $state ops_a_r0_rM_xdN $tran $lambda reset_ops $state $tran '@' $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rM $state $tran ')' $state $tran ',' $state $tran !xdN->$exit sz_mustbe(1) $state ops_arMplus_drN $tran '@' reset_ops $state $tran !rM $state $tran '+' $state $tran ',' $state $tran !drN->$exit sz_mustbe(1) $state ops_arMplus_xdN $tran '@' reset_ops $state $tran !rM $state $tran '+' $state $tran ',' $state $tran !xdN->$exit sz_mustbe(1) $state ops_arM_drN $tran '@' reset_ops $state $tran !rM $state $tran ',' $state $tran !drN->$exit sz_mustbe(1) $state ops_arM_xdN $tran '@' reset_ops $state $tran !rM $state $tran ',' $state $tran !xdN->$exit sz_mustbe(1) $state ops_drM_a_r0_rN $tran $lambda reset_ops $state $tran !drM $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rN $state $tran ')'->$exit sz_mustbe(1) $state ops_drM_aminusrN $tran $lambda reset_ops $state $tran !drM $state $tran ',' $state $tran '@' $state $tran '-' $state $tran !rN->$exit sz_mustbe(1) $state ops_drM_arN $tran $lambda reset_ops $state $tran !drM $state $tran ',' $state $tran '@' $state $tran !rN->$exit sz_mustbe(1) $state ops_drM_drN $tran $lambda reset_ops $state $tran !drM $state $tran ',' $state $tran !drN->$exit sz_mustbe(1) $state ops_drM_xdN $tran $lambda reset_ops $state $tran !drM $state $tran ',' $state $tran !xdN->$exit sz_mustbe(1) $state ops_frM_frN $tran $lambda reset_ops $state $tran !frM $state $tran ',' $state $tran !frN->$exit sz_mustbe(0) $state ops_xdM_a_r0_rN $tran $lambda reset_ops $state $tran !xdM $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rN $state $tran ')'->$exit sz_mustbe(1) $state ops_xdM_aminusrN $tran $lambda reset_ops $state $tran !xdM $state $tran ',' $state $tran '@' $state $tran '-' $state $tran !rN->$exit sz_mustbe(1) $state ops_xdM_arN $tran $lambda reset_ops $state $tran !xdM $state $tran ',' $state $tran '@' $state $tran !rN->$exit sz_mustbe(1) $state ops_xdM_drN $tran $lambda reset_ops $state $tran !xdM $state $tran ',' $state $tran !drN->$exit sz_mustbe(1) $state ops_xdM_xdN $tran $lambda reset_ops $state $tran !xdM $state $tran ',' $state $tran !xdN->$exit sz_mustbe(1) $state ops_fpul_frN $tran $lambda reset_ops $state $tran !ops__fpul_frN->$exit $state ops_frdrN_fpul $tran $lambda reset_ops $state $tran !ops__frN_fpul->$exit pr_mustbe(0) $tran $lambda reset_ops $state $tran !ops__drN_fpul->$exit pr_mustbe(1) $state ops__frN_fpul $tran !frN $state $tran ',' $state $tran "fpul"->$exit $state ops__drN_fpul $tran !drN $state $tran ',' $state $tran "fpul"->$exit $state ops_xmtrx_fvN $tran "xmtrx" reset_ops $state $tran ',' $state $tran !fvN->$exit pr_mustbe(0) $state ops_arMplus_arNplus $tran '@' reset_ops $state $tran !rM $state $tran '+' $state $tran ',' $state $tran '@' $state $tran !rN $state $tran '+'->$exit $state ops_a_off_gbr_r0 $tran '@' reset_ops $state $tran '(' $state $tran !expression expr_offset(8) $state $tran ',' $state $tran "gbr" $state $tran ')' $state $tran ',' $state $tran !r0->$exit $state ops_a_off_rM_r0 $tran '@' reset_ops $state $tran '(' $state $tran !expression expr_offset(4) $state $tran ',' $state $tran !rM $state $tran ')' $state $tran ',' $state $tran !r0->$exit $state ops_a_r0_rM_rN $tran '@' reset_ops $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rM $state $tran ')' $state $tran ',' $state $tran !rN->$exit $state ops_arMplus_rN $tran '@' reset_ops $state $tran !rM $state $tran '+' $state $tran ',' $state $tran !rN->$exit $state ops_arM_rN $tran '@' reset_ops $state $tran !rM $state $tran ',' $state $tran !rN->$exit $state ops_r0_a_off_gbr $tran !r0 reset_ops $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !expression expr_offset(8) $state $tran ',' $state $tran "gbr" $state $tran ')'->$exit $state ops_r0_a_off_rM $tran !r0 reset_ops $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !expression expr_offset(4) $state $tran ',' $state $tran !rM $state $tran ')'->$exit $state ops_rM_a_r0_rN $tran $lambda reset_ops $state $tran !rM $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !r0 $state $tran ',' $state $tran !rN $state $tran ')'->$exit $state ops_rM_aminusrN $tran $lambda reset_ops $state $tran !rM $state $tran ',' $state $tran '@' $state $tran '-' $state $tran !rN->$exit $state ops_rM_arN $tran $lambda reset_ops $state $tran !rM $state $tran ',' $state $tran '@' $state $tran !rN->$exit $state ops_r0_arN $tran !r0 reset_ops $state $tran ',' $state $tran '@' $state $tran !rN->$exit $state ops_a_off_pc_r0 $tran '@' reset_ops $state $tran '(' $state $tran !expression expr_offset(8) $state $tran ',' $state $tran "pc" $state $tran ')' $state $tran ',' $state $tran !r0->$exit $state ops_a_off_pc_rN $tran '@' reset_ops $state $tran '(' $state $tran !expression expr_offset(8) $state $tran ',' $state $tran "pc" $state $tran ')' $state $tran ',' $state $tran !rN->$exit $state ops_a_off_rM_rN $tran '@' reset_ops $state $tran '(' $state $tran !expression expr_offset(4) $state $tran ',' $state $tran !rM $state $tran ')' $state $tran ',' $state $tran !rN->$exit $state ops_rM_a_off_rN $tran $lambda reset_ops $state $tran !rM $state $tran ',' $state $tran '@' $state $tran '(' $state $tran !expression expr_offset(4) $state $tran ',' $state $tran !rN $state $tran ')'->$exit $state ops_arN $tran '@' reset_ops $state $tran !rN->$exit $state ops_imm $tran $lambda reset_ops $state $tran !imm->$exit $state ops_pcrel_w $tran $lambda reset_ops $state $tran !expression $state $tran ',' $state $tran !rN->$exit pcrel_w(0x9000,0xf000) $state ops_pcrel_l $tran $lambda reset_ops $state $tran !expression $state $tran ',' $state $tran !rN->$exit pcrel_l(0xd000,0xf000) $state ops_pcrel_a $tran $lambda reset_ops $state $tran !expression $state $tran ',' $state $tran !r0->$exit pcrel_l(0xc700,0xff00) $state ops_ldc_l $tran '@' reset_ops $state $tran !rN $state $tran '+' $state $tran ',' $state $tran "dbr"->$exit opc_base(0x40f6,0xf0ff) $tran !ctlreg->$exit opc_base(0x4007,0xf00f) $state ops_ldc $tran $lambda reset_ops $state $tran !rN $state $tran ',' $state $tran "dbr"->$exit opc_base(0x40fa,0xf0ff) $tran !ctlreg->$exit opc_base(0x400e,0xf00f) $state ops_lds_l $tran '@' reset_ops $state $tran !rN $state $tran '+' $state $tran ',' $state $tran !sysreg->$exit opc_base(0x4006,0xf00f) $state ops_lds $tran $lambda reset_ops $state $tran !rN $state $tran ',' $state $tran !sysreg->$exit opc_base(0x400a,0xf00f) $state ops_stc_l $tran $lambda reset_ops $state $tran "dbr" opc_base(0x40f2,0xf0ff) $tran "sgr" opc_base(0x4032,0xf0ff) $tran !ctlreg opc_base(0x4003,0xf00f) $state $tran ',' $state $tran '@' $state $tran '-' $state $tran !rN->$exit $state ops_stc $tran $lambda reset_ops $state $tran "dbr" opc_base(0x00fa,0xf0ff) $tran "sgr" opc_base(0x003a,0xf0ff) $tran !ctlreg opc_base(0x0002,0xf00f) $state $tran ',' $state $tran !rN->$exit $state ops_sts_l $tran $lambda reset_ops $state $tran !sysreg $state $tran ',' $state $tran '@' $state $tran '-' $state $tran !rN->$exit opc_base(0x4002,0xf00f) $state ops_sts $tran $lambda reset_ops $state $tran !sysreg $state $tran ',' $state $tran !rN->$exit opc_base(0x000a,0xf00f) $state sysreg $tran "fpscr"->$exit opc_extra(0x0060,0x00f0) $tran "fpul"->$exit opc_extra(0x0050,0x00f0) $tran "mach"->$exit opc_extra(0x0000,0x00f0) $tran "macl"->$exit opc_extra(0x0010,0x00f0) $tran "pr"->$exit opc_extra(0x0020,0x00f0) $state ctlreg $tran "gbr"->$exit opc_extra(0x0010,0x00f0) $tran "r0_bank"->$exit opc_extra(0x0080,0x00f0) $tran "r1_bank"->$exit opc_extra(0x0090,0x00f0) $tran "r2_bank"->$exit opc_extra(0x00a0,0x00f0) $tran "r3_bank"->$exit opc_extra(0x00b0,0x00f0) $tran "r4_bank"->$exit opc_extra(0x00c0,0x00f0) $tran "r5_bank"->$exit opc_extra(0x00d0,0x00f0) $tran "r6_bank"->$exit opc_extra(0x00e0,0x00f0) $tran "r7_bank"->$exit opc_extra(0x00f0,0x00f0) $tran "spc"->$exit opc_extra(0x0040,0x00f0) $tran "sr"->$exit opc_extra(0x0000,0x00f0) $tran "ssr"->$exit opc_extra(0x0030,0x00f0) $tran "vbr"->$exit opc_extra(0x0020,0x00f0) $state imm $tran '#' $state $tran !expression->$exit immediate_value $state r0 $tran $lambda->regname set_register_params("r",0,0,0x0000,0x0000) $state rM $tran $lambda->regname set_register_params("r",0xf,4,0x0000,0x0000) $state rN $tran $lambda->regname set_register_params("r",0xf,8,0x0000,0x0000) $state fr0 $tran $lambda->regname set_register_params("fr",0,0,0x0000,0x0000) $state frM $tran $lambda->regname set_register_params("fr",0xf,4,0x0000,0x0000) $state frN $tran $lambda->regname set_register_params("fr",0xf,8,0x0000,0x0000) $state drM $tran $lambda->regname set_register_params("dr",0xe,4,0x0000,0x0010) $state drN $tran $lambda->regname set_register_params("dr",0xe,8,0x0000,0x0100) $state xdM $tran $lambda->regname set_register_params("xd",0xe,4,0x0010,0x0010) $state xdN $tran $lambda->regname set_register_params("xd",0xe,8,0x0100,0x0100) $state fvM $tran $lambda->regname set_register_params("fv",0xc,6,0x0000,0x0000) $state fvN $tran $lambda->regname set_register_params("fv",0xc,8,0x0000,0x0000) $state regname $tran $symbol->$exit ?register_name($arg) $tran $symbol ?register_prefix($arg) $state $tran '{' $state $tran !expression ?expr_names_register $state $tran '}'->$exit $state pseudo_instr $tran "SHLL"->pseudo_SHLL $tran "SHLR"->pseudo_SHLR $tran "SHAR"->pseudo_SHAR $tran "SHXR"->pseudo_SHXR $tran "SETI.L"->pseudo_SETI pseudo_set_setup(4,"SETI.L") $tran "SETI.W"->pseudo_SETI pseudo_set_setup(2,"SETI.W") $tran "SETI.B"->pseudo_SETI pseudo_set_setup(1,"SETI.B") $tran "SETS.L"->pseudo_SETS pseudo_set_setup(4,"SETS.L") $tran "SETS.W"->pseudo_SETS pseudo_set_setup(2,"SETS.W") $tran "SETCONST"->$exit pseudo_set_constants $state pseudo_SHLL $tran !ops_imm_rN_opt_rM->$exit pseudo_shll $state pseudo_SHLR $tran !ops_imm_rN_opt_rM->$exit pseudo_shlr $state pseudo_SHAR $tran !ops_imm_rN_opt_rM->$exit pseudo_shar $state pseudo_SHXR $tran !ops_imm_rN_opt_rM->$exit pseudo_shxr $state pseudo_SETI $tran !ops_imm_rN_opt_rM->$exit pseudo_set_inline $state pseudo_SETS $tran !ops_imm_rN->$exit pseudo_set_separate $state vinstruction $tran "v.add"->vinstr_i8_d9_ari v_base(0x80) $tran "v.addc"->vinstr_i8_d9_ari v_base(0x90) $tran "v.and"->vinstr_i8_d9_ari v_base(0xe0) $tran "v.be"->vinstr_cmpbr v_base(0x30) $tran "v.bn"->vinstr_d9_b3_r8 v_base(0x88) $tran "v.bne"->vinstr_cmpbr v_base(0x40) $tran "v.bnz"->vinstr_r8 v_base(0x90) $tran "v.bp"->vinstr_d9_b3_r8 v_base(0x68) $tran "v.bpc"->vinstr_d9_b3_r8 v_base(0x48) $tran "v.br"->vinstr_r8 v_base(0x01) $tran "v.brf"->vinstr_r16 v_base(0x11) $tran "v.bz"->vinstr_r8 v_base(0x80) $tran "v.call"->vinstr_a12 v_base(0x08) $tran "v.callf"->vinstr_a16 v_base(0x20) $tran "v.callr"->vinstr_r16 v_base(0x10) $tran "v.clr1"->vinstr_d9_b3 v_base(0xc8) $tran "v.dbnz"->vinstr_dbnz v_base(0x50) $tran "v.dec"->vinstr_d9_ari v_base(0x70) $tran "v.div"->vinstr_simple v_base(0x40) $tran "v.inc"->vinstr_d9_ari v_base(0x60) $tran "v.jmp"->vinstr_a12 v_base(0x28) $tran "v.jmpf"->vinstr_a16 v_base(0x21) $tran "v.ld"->vinstr_d9_ari v_base(0x00) $tran "v.ldc"->vinstr_simple v_base(0xc1) $tran "v.mov"->vinstr_mov v_base(0x20) $tran "v.mul"->vinstr_simple v_base(0x30) $tran "v.nop"->vinstr_simple v_base(0x00) $tran "v.not1"->vinstr_d9_b3 v_base(0xa8) $tran "v.or"->vinstr_i8_d9_ari v_base(0xd0) $tran "v.pop"->vinstr_zd9 v_base(0x70) $tran "v.push"->vinstr_zd9 v_base(0x60) $tran "v.ret"->vinstr_simple v_base(0xa0) $tran "v.reti"->vinstr_simple v_base(0xb0) $tran "v.rol"->vinstr_simple v_base(0xe0) $tran "v.rolc"->vinstr_simple v_base(0xf0) $tran "v.ror"->vinstr_simple v_base(0xc0) $tran "v.rorc"->vinstr_simple v_base(0xd0) $tran "v.set1"->vinstr_d9_b3 v_base(0xe8) $tran "v.st"->vinstr_d9_ari v_base(0x10) $tran "v.sub"->vinstr_i8_d9_ari v_base(0xa0) $tran "v.subc"->vinstr_i8_d9_ari v_base(0xb0) $tran "v.xch"->vinstr_d9_ari v_base(0xc0) $tran "v.xor"->vinstr_i8_d9_ari v_base(0xf0) $state vinstr_i8_d9_ari $tran !imm->$exit v_assemble(VAS_BASEADD,0x01,VAS_BASE,VAS_IMM8,VAS_END) $tran !vari->$exit v_assemble(VAS_BASEADD,0x04,VAS_ADDI,VAS_BASE,VAS_END) $tran !vd9->$exit v_assemble(VAS_BASEADD,0x02,VAS_ADDD8,VAS_BASE,VAS_DLOW,VAS_END) $state vinstr_d9_ari $tran !vari->$exit v_assemble(VAS_BASEADD,0x04,VAS_ADDI,VAS_BASE,VAS_END) $tran !vd9->$exit v_assemble(VAS_BASEADD,0x02,VAS_ADDD8,VAS_BASE,VAS_DLOW,VAS_END) $state vinstr_simple $tran $lambda->$exit v_assemble(VAS_BASE,VAS_END) $state vinstr_mov $tran !imm $state $tran !vari->$exit v_assemble(VAS_BASEADD,0x04,VAS_ADDI,VAS_BASE,VAS_IMM8,VAS_END) $tran !vd9->$exit v_assemble(VAS_BASEADD,0x02,VAS_ADDD8,VAS_BASE,VAS_DLOW,VAS_IMM8,VAS_END) $state vinstr_zd9 $tran !vd9->$exit v_assemble(VAS_ADDD8,VAS_BASE,VAS_DLOW,VAS_END) $state vinstr_a12 $tran !varef->$exit v_assemble(VAS_ADDA12H,VAS_BASE,VAS_A12LOW,VAS_END) $state vinstr_a16 $tran !varef->$exit v_assemble(VAS_BASE,VAS_A16,VAS_END) $state vinstr_r8 $tran !varef->$exit v_assemble(VAS_BASE,VAS_R8,VAS_END) $state vinstr_r16 $tran !varef->$exit v_assemble(VAS_BASE,VAS_R16,VAS_END) $state vari $tran '@' $state $tran "r0"->$exit v_seti(0) $tran "r1"->$exit v_seti(1) $tran "r2"->$exit v_seti(2) $tran "r3"->$exit v_seti(3) $state vd9 $tran !expression->$exit v_save_d9 $state varef $tran !expression->$exit v_save_aref $state vinstr_d9_b3_r8 $tran !expression v_save_d9 $state $tran ',' $state $tran !expression v_save_b3 $state $tran ',' $state $tran !varef->$exit v_assemble(VAS_ADDD9B3,VAS_BASE,VAS_DLOW,VAS_R8,VAS_END) $state vinstr_dbnz $tran !vari->vinstr_dbnz_vari $tran !vd9->vinstr_dbnz_d9 $state vinstr_dbnz_vari $tran ',' $state $tran !varef->$exit v_assemble(VAS_BASEADD,0x04,VAS_ADDI,VAS_BASE,VAS_R8,VAS_END) $state vinstr_dbnz_d9 $tran ',' $state $tran !varef->$exit v_assemble(VAS_BASEADD,0x02,VAS_ADDD8,VAS_BASE,VAS_DLOW,VAS_R8,VAS_END) $state vinstr_cmpbr $tran !imm->vinstr_cmpbr_i8 $tran !vari->vinstr_cmpbr_arj $tran !vd9->vinstr_cmpbr_d9 $state vinstr_cmpbr_i8 $tran ',' $state $tran !varef->$exit v_assemble(VAS_BASEADD,0x01,VAS_BASE,VAS_IMM8,VAS_R8,VAS_END) $state vinstr_cmpbr_d9 $tran ',' $state $tran !varef->$exit v_assemble(VAS_BASEADD,0x02,VAS_ADDD8,VAS_BASE,VAS_DLOW,VAS_R8,VAS_END) $state vinstr_cmpbr_arj $tran ',' $state $tran !imm $state $tran ',' $state $tran !varef->$exit v_assemble(VAS_BASEADD,0x04,VAS_ADDI,VAS_BASE,VAS_IMM8,VAS_R8,VAS_END) $state vinstr_d9_b3 $tran !vd9 $state $tran ',' $state $tran !expression v_save_b3 $state $tran $lambda->$exit v_assemble(VAS_ADDD9B3,VAS_BASE,VAS_DLOW,VAS_END) $state pseudo_vinstr